As devices manufactured using integrated circuits continue to shrink, the need for smaller packages for the integrated circuit devices continues to increase. One approach increasingly used to save space on a system circuit board and to reduce the board area used is to provide two or more integrated circuits in a combined, vertically arranged package structure called a “Package on Package” or “PoP” device. The PoP structure reduces the board area needed and also eliminates the need for some of the connector traces on the circuit board that would otherwise connect the devices to each other. Through via connections may be used to provide electrical connections between the vertically arranged packaged devices.
For example, a memory module may be the device in an upper package in a PoP structure. The memory module could include one, two or more commodity memory devices such as DDR DRAM, or FLASH devices, as non-limiting examples. The upper package substrate may be a multiple level circuit board, and may be formed of a resin, such as epoxy glass resin, FR4, BT resin, ceramic, plastic, film, or other substrate materials including those with fiberglass cores in a resin material.
The bottom surface of the upper substrate may have one or more rows of PoP connectors extending vertically away from the bottom surface of the top substrate. These PoP connectors provide the connections to either the integrated circuit mounted on the bottom package of the PoP device, or, to connections that will be mapped to the system board when the PoP device is finally mounted on the system circuit board.
The bottom package is a substrate that also has at least one integrated circuit mounted on it. This integrated circuit may be an ASIC, microprocessor, microcontroller, or the like. The upper surface of the bottom package has lands or pads for receiving and electrically connecting to the PoP connectors. For example, if the PoP connectors are rows of solder balls extending from the bottom surface of the upper package, lands or pads on the upper surface of the bottom package will correspond to, and receive, those connectors.
The bottom substrate of the PoP will also have external connectors for making the final connection between the PoP structure and the system circuit board. The bottom package may be a ball grid array (“BGA”) type package and have solder balls arranged in an array on the bottom surface. Thus the PoP device has connector terminals between the top substrate and the bottom substrate, and, connector terminals extending from the bottom substrate that are mounted on pads on a system circuit board. During thermal cycling tests, ball strain has been observed in PoP packages. This ball strain can cause the connector terminals, such as solder balls, to crack or lift off of the conductive pads, creating defects or circuit failures. As the substrates used in the PoP devices are increasingly becoming thinner, and more package warpage is observed due to thermal effects, the observed ball strain is increasing.
The drawings, schematics and diagrams are illustrative and not intended to be limiting, but are examples of embodiments of the disclosure, are simplified for explanatory purposes, and are not drawn to scale.